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January 22nd, 2009, 05:38 AM
#1
Harvard architecture processor as Assembler/Compiler?
Hi all,
I just want to know that, how does a harvard architecture processor support the functionality of an assembler or compiler, since these programs generate output which is code and not data? Because I read from the book that said Harvard architecture have separate space for data and code? Is it by using the buses connecting them??
Thanks all.
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