Computer Logic and Electronics

[sukhi5710]

Hi. I have a few questions i dont know how they really works and it would be appreciated if some one answeres.

1. Describe the function and interation of a control unit, arithmetic unit and memroy registers in a simple central processing unit?
2. illustrate how buses move data and instructions between memory and CPU?
3. Describe the role of flip-flops in the flow of data. Explain how flip-flops can be built using the siple logic circuits? How are flip-flops used as information storage.

Thank You

[Ejaz]

Why don't you try your text book?

[gstercken]

See this FAQ...

[GremlinSA]

See this FAQ...

Now why didn't i know about this FAQ.. Would have loved to have used it quite a few times...

Now bookmarked for future reference.....

[Deniz]

See this FAQ...

I'd rep you but we're in chit-chat

[kirants]

Couldn't believe we have an FAQ on that
I'll bookmark it too

[mehdi62b]

1. Describe the function and interation of a control unit, arithmetic unit and memroy registers in a simple central processing unit?

the main registers are :

• Data Register(DR) : at fetch-time it has op-code and in execution time it has the addressof operand
• Address Register(AR) : at fetch-time it keeps the address of op-code and in execution time it has the address of operand
• Instruction register(IR) : it has just the op-code
• Program Counter (PC) : the address of next instruction
• Accumulator(AC) : a place for saving the results or other necessary computations

the order of execution of an instuction (ADD instruction)

1. CPU activaeted? yes :goto 2
2. AR <-- PC
3. DR <-- M(AR)
4. IR <-- (op-code)DR , PC <-- PC+1 , DECODE instruction
5. switch ADD Goto 6 , switch LOAD Goto ... , switch ... Goto ...
6. AR <-- DR(Address)
7. DR <-- M(AR)
8. AC <-- AC+DR

1 -- 4 : fetch Cycle which is common for different instructions
5 -- 8 : execution Cycle

every proccessors have a number of function which Control Unit should execute them in the above order
for example

C3 ------- IR <-- (op-code)DR 
C6 ------ PC <-- PC+1

in fourth clock cycle,control unit would open the gates related to C3 and C6

2. illustrate how buses move data and instructions between memory and CPU?

there are buffers there,Memory Buffer Register(MBR) & Memory Address Register(MAR),you give decoders MAR as input addresses and get the content of memory in MBRs

3. Describe the role of flip-flops in the flow of data. Explain how flip-flops can be built using the siple logic circuits? How are flip-flops used as information storage.

Latch are made form two NAND or NOR gates

by adding clock to latch you have flipflop,which are several kinds(SR,TR,JK,D-FF,...)
for avoiding Race problem you can use two FFs for synchronizing them with clock cycles (master-slave FFs)